Non-Silicon Transistors and Its Fabrication

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Table of Contents

Introduction
Non-silicon transistors from indium gallium arsenide
Carbon Nanotube Transistors
GaAS and InP heterojunction bipolar transistors
3-D integrated circuit
Fabrication of the non-silicon transistors
Conclusion
References

Introduction

Over the decades, an observable advancement in electronic devices has been inevitable. The devices continue to reduce in size without eliminating the important components that facilitate their use. The trend is also evident in millions of transistors, which keeps advancing using a single silicon chip. The use of several components of transistors under one chip continues to create the best outlook that is necessary for the various operational functions. The current rate of technological progress is an indication that the devices will be very small in the next one or two decades (International Technology Roadmap for Semiconductors, 2015). The trend is also notable in the various transistors. Although most companies and technology firms focus on the use of semiconductors in forming the transistors, these semiconductors tend to cause significant wastage of energy in the form of heat limiting its efficiency.

The attempt to improve the designs of transistors continues to keep scientists focused on experimenting with various materials. Importantly, the introduction of silicon did create a different model of the transistors. Nevertheless, scientists still focus on developing transistors that are more advanced. In 2007, Yap proposed and experimented with the use of nanoscale insulator with nanoscale metals to create resistors that are more advanced (International Technology Roadmap for Semiconductors, 2015). However, later the experimenting the transistor was successful though used a nanoscale insulator, boron nitride nanotubes (BNNTs).

Non-silicon transistors from indium gallium arsenide

One of the present transistors is that of the indium gallium arsenide. The non-silicon transistor is one of an advance level with small size and higher performance. The transistor, which applies Moore’s Law, is known for the development of the first packed computer chip that enabled the reduction of the size of the computer. Nevertheless, the transistor has been fading off over time due to the advancing of technology.

In order to remain relevant in the advancing technology, the MIT researchers developed a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The transistor comprising of indium gallium arsenide as the semiconductor material instead of the commonly used silicon is advantageous since it produces a higher electron velocity. The higher electron velocity, in turn, maintains a higher output current is enhancing the efficiency of the transistor. Besides, the transistor has a small size enabling its portability.

The techniques of manufacturing this indium gallium MOSFET is presently used in designing most of the silicon chips. A notable application is in the formation of a compound semiconductor transistor that depends on the molecular beam epitaxy during the formation process. The process uses the principle of evaporation of the indium gallium arsenide compound while in vacuum to form the transistor (Beyond Silicon: Transistors for the Future, 2015). Besides, the process also uses a layer of molybdenum on the drain electrodes. Using an electron beam lithography, the process is capable of carving away any unwanted material. This makes the formation of the gate oxide possible between the source of electrons and the drain contacts. Nevertheless, this type of transistor is undergoing an advancement process to create transistors that are more advanced.

Carbon Nanotube Transistors

The Carbon Nanotube Transistors (CNT) developed by a Stanford team has record-setting current densities that help in stacking the transistors to produce 3-D circuits. The transistor, developed in 2003, was that first carbon nanotube computer globally at that time. The transistor comprised of a clock speed of 1 kilohertz as well as 200 transistors that continue to continue to compete in the present silicon-based processors world.

The development of the first CNT reduced the gap between silicon and carbon nanotubes. According to presentations at the San Francisco IEEE International Electron Devices Conference, the Stanford team showcased their ability to make carbon nanotube transistors having current densities and as smaller as the silicon-based transistors. Together with the ability to build carbon nanotube transistors using silicon circuits as portrayed by Marx Shulaker, the team introduced researchers to experiment with the formation of carbon-based resistors, which continues to hit the technology industry.

During the same year, Philip Wong developed a more advanced carbon-based transistor that provided energy-efficient and speedy switches. The new model of transistors, called graphene uses carbon nanotube though with a natural semiconductor. Nevertheless, it has been tricky to form carbon nanotubes that are capable of providing a sizeable amount of current (Beyond Silicon: Transistors for the Future, 2015). In order to curb the challenge, scientists continue to experiment with various combinations to produce the desired transistor. Consequently, scientists developed a mix of semiconducting and metallic components to produce more efficient carbon tubes. Nonetheless, such transistors need standardization such as ensuring uniformity of the nanotubes. The failure of the model continues to increase the degree of experimentation to produce transistors with notable performance and power benefits.

GaAS and InP heterojunction bipolar transistors

The transistor is one of the comprehensive technological transistors that provide superior performance. The transistor commonly used in millimeter-wave and microwave uses the principle of heterojunction bipolar transistors (HBTs). The model, which constitutes a larger part of the wireless and mobile communications, uses an integration of various treatments such as SiGe, GaAS, and InP HBTs (IEEE, 2015). The model uses a combination of various systems fabrication procedures as well as materials that enable its efficiency largely compared to the silicon-based transistors. Notably, this model of transistors tends to enhance the efficiency of transistors.

The IBM experiment on metallic carbon nanotubes in the mix is one of the current achievements in an attempt to replace the silicon-based transistors with carbon transistors. The metallic system is capable of making the transistor on even when the transistor should be off. The automation of the transistors tends to reduce the ration of off-current and on-current. The current IBM transistors did max out at an estimated ration of 600:1 as estimated by Shulaker (Anthony, 2014). The ratio developed by the team is essential in reducing the possibility of current leakage through the device when the device is off.

3-D integrated circuit

The introduction of the monolithic 3-D integrated circuit also a notable achievement in the compatibility of the non-silicon transistors with silicon ones. The model, which uses a multiple-transfer strategy, is efficient in the monolithic IC. The design of the transistor uses one fell swoop on a single silicon substrate. The strategy builds strata of equipment placed on each other using a dense metal wiring that connects the components of the devices. The development of such a model of transistor enables the formation of a crossbar switch that is capable of connecting with multiple inputs and outputs. The diversity of these carbon nanotube transistors show the possibility of changing in the future to more advanced systems that aim at reducing the size and increasing performance (Anthony, 2014). The 3-D circuit uses a two-layered restive RAM sandwiched with a layer of carbon nanotube transistors. These transistors are capable of stacking temperatures without raising the temperatures above 4000C making them more efficient.

According to Sung Kyu Lim, a specialist designer of the monolithic 3-D, the stacking of the transistors is one of the best methods globally that increased performance with a notable reduction in current wastage (IEEE, 2015). Researchers at CEA-Leti managed to develop a stacked logic on top of logic rather than the initially used silicon. The development provided the first stacking of memory and logic in a monolithic fashion. A combined set of memory and logic reduced the energy and time used for extracting data from a computer. The development has been useful in enhancing the efficiency of the carbon-based nanotube transformers.

Mass production of the carbon nanotube ICs has been a problem for many scientists and technology firms as Lim notes. This is the next big thing that is likely to emerge in the future that is likely to improve the efficiency of the carbon-based nanotube transistors. The development will involve a further reduction in the size of the nanotube transistors as the circuits become larger. Presently, the carbon nanotube transistors have a length of 400 nanometers, a length that is 10 times the size of the silicon transistors. Therefore, to improve their competitive advantage over the silicon transistors such components need thorough analysis.

The subsequent phase in the enhancement of the non-silicon transistors is constructing speedier circuits that have short-channels. Currently, the carbon nanotube transistors have a channel length of 10 nm. However, to maintain a higher efficiency the channel lengths have to undergo a reduction to a length of less than 10 nm. Similarly, o overcome the hurdles of the high performance, the metal contacts that connect the nanotubes need a reduction in size to reduce the resistance (Germanium comes home to Purdue for semiconductor milestone, 2014). Smaller contacts cover a short distance and, therefore, are capable of reducing the current loss during transmission. Future experiments focus on developing high-performance carbon nanotube transistors with minimal resistance and reduced length. Wong notes that it is important to focus on developing a carbon nanotube transistor that can compete with silicon transistors efficiently.

Fabrication of the non-silicon transistors

The fabrication process is another component of the carbon nanotube transistors that require proper experimentation for efficient performance. Currently, the fabrication constitutes the use of quartz, which anchors the carbon nanotubes. Using a thermal tape, the nanotubes undergo peeling processing that transfers them to the target surface. On the surface of the nanotubes is an array of parallel carbon nanotubes that eases off on the application of the thermal tape (IEEE, 2015). On application, the gold undergoes a chemical removal enabling the surface transfer of current, and, notably, every single transmission produces approximately eight nanotubes per micrometer. The measurement is normally done in the direction of the flow of current across the devices. Nevertheless, the procedure is time-consuming with repeated deposition process of laying down the glue-like polymer prior to the successive deposition of carbon nanotubes (Anthony, 2015). Observably, the polymer limits the sticking of the carbon nanotubes creating the need to develop a device that does not use a polymer. In addition, such carbon nanotubes turn to a viscous substance when left open to the liquids that can remove the gold. Even though the exposure to liquids smoothens the surface for the next layer of nanotubes, it contributes to low performance due to increased current leakage.

The currently used fabrication process in non-silicon transistors is more inefficient than the silicon-based transistors. The average current density of the carbon nanotube transistors is 100 carbon nanotubes per micrometer, a value that is lower than the silicon transistors which stands at 122 microamperes per micrometer (Germanium comes home to Purdue for semiconductor milestone, 2014). Notably, the value is neither the maximum current density nor the uppermost density of carbon nanometer transistors, as there are extremely high values that such transistors can accommodate. Therefore, there is a need to develop carbon nanometers, which are capable of providing more efficient density as well as the highest current densities. An attempt to produce nanotubes that are more efficient was done by IBM’s Research Centre reporting the possibility of producing exceedingly more than 500 carbon nanotubes per micrometer as well similar current densities (Germanium comes home to Purdue for semiconductor milestone, 2014). Nevertheless, the results of the experimentation are not yet out to date prompting the possibility of developing carbon nanotube transistors, which can match or even surpass the current densities and highest density of the silicon-based transistors.

Conclusion

The development of efficient non-silicon transistors has been a challenge over a long time. Nevertheless, with the current research and experimentation on the alternative transistors to that of silicon is an indication of a change in the outlook of the non-silicon transistors to suit the applicability. Some of the notable advancements that are likely to change the future outlook of the non-silicon conductors are fabrication strategy, improving density, developing transistors of higher velocity of transmission of electrons and high-density current.

References

Anthony, S. (2014). IBM plows $3 billion into 7nm chip research and ‘post-silicon’ computer technology. Web.

Anthony, S. (2015). Intel forges ahead to 10nm, will move away from silicon at 7nm. Web.

Beyond Silicon: Transistors for the Future. (2015). Web.

Germanium comes home to Purdue for semiconductor milestone. (2014). Web.

IEEE. (2015). IEEE – The world’s largest professional association for the advancement of technology. Web.

International Technology Roadmap for Semiconductors. (2015). Web.

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