Category: Electrical Engineering

writing lab report steps
1. Title page
Team Member #1 Name
Team Member #1 Major

writing lab report steps
1. Title page
Team Member #1 Name
Team Member #1 Major
Team Member #2 Name
Team Member #2 Major
ECE 2100 Laboratory Report
Title of Experiment
Date Laboratory was Performed
Name of Laboratory Instructor
Day/Time of your lab section
2. Summary (on separate page): Brief but complete statement of what you did.
Example:
The complex power of a series-connected ??? Ω resistor (R) and ??? H inductor (L) operating at 60
Hz was investigated. The complex power was determined to be 100 + 100j VA by hand analysis and
simulation. Addition of a ??? uF capacitor connected in parallel to the RL load resulted in a unity
power factor in both hand analysis and simulation work.
3. Prelab: Include the prelab results here after correcting any errors. Whenever possible present
results in tabular form. If there is not a prelab assignment include simply indicate N/A in this
section. Only one prelab per report, even if the prelab was completed individually.
4. Results:
a. Present your results keyed to each step of the laboratory procedure.
Include schematics, sketches, plots, etc.
b. Describe what was done and document your results.
5. Analysis: Provide response(s) to any end-of-lab questions. If none simply indicate N/A in this
section. Only one analysis section per report.
6. Contributions: List the contributions of each team member to completion of the experiment and
report.
7. Conclusions: Describe lessons learned.
8. Lab Notebook: Attach the related lab notebook pages as an appendix FOR EACH TEAM
MEMBER. Team members with poor notebook entries will be penalized.

Turn-In Instructions
Please show all of your work on paper, tablet, etc. When yo

Turn-In Instructions
Please show all of your work on paper, tablet, etc. When you are ready to submit, please scan or take take clear photos of your work and upload to Canvas. There are free scanner apps for mobile devices that you can use to scan and compile all of your images into one PDF. Submitting one PDF is ideal, but if you’re not able to get that to work, don’t sweat it.
Due Date
The submission deadline for this homework
HW 6 – Karnaugh Maps
In the textbook, Fundamentals of Logic Design, 7th Edition:
Homework Set 5: 5.6 – 5.8. 5.9a. 5.12 (Misprint: 5.9a ∑M should be ∑m)

Please see the attached files for Lab details. You might need a datasheet for th

Please see the attached files for Lab details. You might need a datasheet for the transistor so I uploaded it as well as the lab task. The report instruction file is uploaded as well. The work whether written or done in mutlisism should be solely yours. No use of AI or anyother source.

Fill out form:
Cornell Notes Template.doc
To learn all about Cornell Notes watch

Fill out form:
Cornell Notes Template.doc
To learn all about Cornell Notes watch: How to Use Cornell NotesSubmit the form type to get full credit.

Purpose:
The lab aims to introduce engineering students to current industry prac

Purpose:
The lab aims to introduce engineering students to current industry practices that utilize Hexadecimal and Binary data to provide the user with system status. In industry, the engineer designing the system uses the tools taught in the class to isolate specific BITs from other information being transmitted. The class focuses on the digital design aspect and uses hypothetical results whereas this lab gaps the ideal of the results being tied to something tangible.
This is a two-part lab; the student has 1 week to turn in the lab report. Part two is assigned after the first lab has been completed.

Deliverables:
Each Lab is comprised of three sections: Background, findings, and Conclusion
Task 1 -3 will be answered under the Finding Section whereas task 4 is answered under the conclusion section. You will be expected to show your calculations. After you convert to binary, annotate the bit with the associated fault.

PART 2 Lab (20 points):
Background
After performing some research, you discover the system requires 3 minutes to warm up before the operation. You perform the test and receive 08043102 Hexadecimal words. From the description below you realize the hexadecimal number “8” is an expected error because the antenna is not attached. The “2” is also expected when the self-test running its fault status is “0”. When the self-test has been completed the fault status returns a “1”.
Task 2:
Convert 08043102 (hexadecimal word) into Binary. Include your calculation and identify the MSB and LSB (5 points)
Use the first tab in the excel sheet “RT Cross Reference” to cross-reference Bit error to the subsystem. Remember a Bit “0” is a no-fault status. write down the fault next to the BIT. (5 points)
Read the “RT description” doc to see if you isolate a fault in a circuit card. If you don’t know what needs to be replaced, you can create a test plan. (5 points)
In one paragraph summarize the failure(s) and provide a brief description of how the loss affects the RT. (5 points)

Watch Videos:
1) Binary Addition
2) Negative Numbers in Binary: 2’s Complement
3

Watch Videos:
1) Binary Addition
2) Negative Numbers in Binary: 2’s Complement
3) Binary Subtraction
4) Binary Multiplication
5) Binary Division
Fill out form:
Cornell Notes Template.doc
To learn all about Cornell Notes watch: How to Use Cornell NotesLinks to an external site.
Complete and Submit the form typed or in the same format to receive full credit.

Introduction
In this lab, we will be designing an encoder circuit that encodes n

Introduction
In this lab, we will be designing an encoder circuit that encodes negative decimal numbers into binary, in sign and magnitude form. This will include creating a truth table, K-maps for all outputs and a Multisim circuit diagram.
Procedure
Part 1 – Complete the Truth Table for the Encoder
Let the input to the circuit be any decimal number between -2 to +2. You can use three bits to represent these decimal numbers, where A = 2, B = 1, C = 0 as well as a sign bit, S, that indicates the sign of the input number (S = 0 for positive, S = 1 for negative).
The outputs of the circuit should be:
A flag, F, that separates cases 000 from 001 (F = 0 for no input and F = 1 for 0, 1, 2)
A 3-bit binary equivalent number, in sign-magnitude form. Recall that to count to 2 in binary, you’ll only need two binary bits, so the third output bit is reserved for the sign.
Part 2 – K-maps
1. Create K-maps for all four outputs listed above.
2. From the K-maps determine the minimal functions for each output.
Part 3 – Draw the Circuit in Multisim
Using your output equations from part 2, draw the gate logic array for the special encoder. meaning you are designing a logic circuit that will be placed inside the encoder.
Be sure to connect digital indicators to each output.
Simulate your circuit and save a copy of your schematic showing the verification for the decimal input of -1. if your design does not work see if you can logically determine circuity based on your knowledge of logic gates and how they function.
Part 4 – Lab Report
the Lab should have 3 sections: 1st is Background, 2nd Findings and Last is Conclusion.
the Background: this is the summary of the lab and the goal of the lab
Findings: these are the steps of the lab from beginning to end. typically there should be enough information for someone else to duplicate your work.
Conclusion: a summary of your results good or bad. anything you observed, learned or did not understand.
Using either Google Docs, Word, or the pdf generator of your choice, compile your images into one file.
Be sure to include figure labels for your images in proper MLA format (figure labels centered below schematics and table labels left-justified above the table). Submit via Canvas as lab1yourlastname.pdf.

Instruction: ALU
How to design a counter: Ch 9 CountersRequire:
Multisim simulat

Instruction: ALU
How to design a counter: Ch 9 CountersRequire:
Multisim simulation
Tinkercad simulation
Demo a working counter
Technical report
In this laboratory activity, you will design your own ALU. You will verify the functionality of the ALU according to Multisim and Tinkercad simulations, and the theory learned in class. To facilitate such activity, a procedure is specified below. Make sure to keep track of LSB and MSB, as you know it is very important to understand the results.
References:
Lecture notes
Fundamentals of Logic Design by Roth and Kinney

Watch Video:
Understanding Logic GatesLinks to an external site.
Fill out form:

Watch Video:
Understanding Logic GatesLinks to an external site.
Fill out form:
Cornell Notes Template.doc
To learn all about Cornell Notes watch: How to Use Cornell Notes

urn-In Instructions
Please show all of your work on paper, tablet, etc. When you

urn-In Instructions
Please show all of your work on paper, tablet, etc. When you are ready to submit, please scan or take clear photos of your work and upload to Canvas. There are free scanner apps for mobile devices that you can use to scan and compile all of your images into one PDF. Submitting one PDF is ideal, but if you’re not able to get that to work, don’t sweat it.
Due Date
The submission deadline for this homework
Chapter 11: Multiplexers, Decoders, and PLD Homework Set 9: 11.1 – 11.10, 11.24